| Time |
Track 1 |
Track 2 |
| 8:30 - 9:30 |
签到 / 早餐 Registration / Breakfast |
| 9:30 - 9:35 |
开幕词 / Opening |
| 9:35- 10:05 |
VIP Keynote :A connection you can rely on!
Tom Floodeen,Vice President and General Manager of Customer Support
|
| 10:10 - 10:50 |
利用Catapult LB创建高层次综合工艺库
Build high level synthesis libraries by Catapult Library Builder
--中芯国际(SMIC) 夏克国
|
Xtreme PCB 助力一版成功
Xtreme PCB helps one Artmaster PCB design successful
--上海贝尔阿尔卡特( Alcatel-Lucent Shanghai Bell) 李伟
|
| 10:50 -11:10 |
茶歇 Coffee break |
| 11:10 -11:50 |
基于AVM的逻辑验证
Logic Verification based on AVM
-- H3C 刘洪玉 |
统一规范高端PCB研发技术提升电子系统与装备质量可靠性
Adopt High-end PCB Design Technique, Improve Electrical System and Equipment Quality & Reliability
-兵器工业集团计算机应用技术研究所 吴宝新
|
| 11:50 - 12:30 |
Using 0-In in PKUnity 863 SoC Verification
--北京大学微处理器研究开发中心 冯毅
|
柔性板设计和在Mentor Graphics 设计环境中的实现
Flexbile design and realization in Mentor Graphics design environment
--伟创力 (Flextronics) 杨福
|
| 12:30 - 14:00 |
午餐 Lunch |
| 14:00 - 14:40 |
Minimizing yield loss risks through post-OPC verification and Litho friendly Design
--中芯国际(SMIC) 刘庆炜 |
高速高密度计算机主板设计挑战与解决方案
Complex High Density Computer Motherboard Design Challenge & Solution
--航天科工集团706所 蒋志翔 |
| 14:40 -15:20 |
一种提高超大规模复杂数字设计的测试质量的可测试方法和实施方案
DFT Methodologies and Implementation to Enhance the Test Quality for a Large-scale Complex Digital Design
--英飞凌(Infineon) 肖清石
|
电子设计工程化环境与企业信息化平台建设构思
Prospect For Electronics Design Engineering Environment & Enterprise Information Platform Construction
--航天科工集团8358所 陈斐霞
|
| 15:20-15:25 |
结束语 Closing |
| 15:25 - 17:00 |
酒会 / 趣味游戏 (凡参与就可赢取精美礼品) Cocktail &Activities |
| 17:00 - 19:00 |
颁奖典礼 |
| 三次幸运抽奖 |
| 晚宴 Luchy Draw&Dinner |